solver - Resolving problems with Algebraic Loops in SIMULINK models -


my problem

i have simulink model has got feeback loop aka algebraic loops causing error in simulation. original solver configuration fixed-step dormand-prince (order 5). tried fixed-step order 3 (runga-kutta). still has not resolved issue.

my question

is there way resolve algebraic loop without altering original performance or design of circuit much?

clarification question

i sure there way solve this. however, don't want compromise original performance of circuit. moreover, customer-supplied data , seems have managed work out fine. require point me right direction regarding how solve this.

my approach far

i tried break loop using:

i) switch (if ip = 0, op = 0; if ip = 1, op = 1) know stupid different block breaks loop.

ii) logic gate (xoring feedback signal 0).

unfortunately, don't know how zero-order hold unit delay loop seems commonly prescribed solution kind of problem. believe may cause issues model's intended performance.

i have posted query on mathworks website, no response far. thought...why not stackoverflow? below image.

enter image description here

add unit delay block on feed signal (from logical operator1 logical operator4).

the unit delay provides previous value of output signal - won't affect of circuitry in scenario.


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